1. Field of the Invention
The present invention relates to a peak detecting device and a peak detecting method for detecting a peak of an analog signal which is given from an outside.
2. Description of Related Art
In a device for carrying out at least one of various types of measures concerning an analog signal which is given from an outside, an A(Analog)/D(digital) converter carries out a process for sampling the analog signal by a predetermined sampling frequency to convert it to digital data. Thereafter, the digital data converted by the A/D converter are memorized in a memory which is called a sampling data memory temporarily, and are used for the following process.
However, according to the process by the above-described conventional A/D converter, the sampling frequency is decided regardless of a level change of the analog signal. Therefore, it is not necessarily that a timing for sampling the analog signal coincides with one of a peak of the analog signal. Accordingly, in order to detect the peak of the analog signal in a small error, various plans have been carried out.
In the above-described example, for example, a method for making the sampling frequency higher to increase the number of sampling the analog signal every unit time, has been known. In this case, the sampling of the analog signal is carried out every a shorter time, so that it becomes easier to detect the peak of the level of the analog signal.
Further, as disclosed in Japanese Patent Application Publication (Laid-open) No. Tokukai-hei 10-160507, the following method of sampling the analog signal, has been known. In the method, on the basis of the digital data obtained by sampling the analog signal, an operation by a predetermined complementary function is carried out to compute a complementary data. On the basis of the complementary data computed by the operation and the digital data obtained by sampling, the peak of the analog signal is determined by the operation. Accordingly, according to the method, it is possible to detect the peak of the analog signal more correctly, without making the sampling frequency higher.
However, according to the above-described conventional method, it was necessary to use the hardware having the much higher performance, so that there was a problem to require the higher production cost for it.
That is, in the above-described method of making the sampling frequency higher, the number of sampling the analog signal is increased rapidly so that the amount of digital data obtained by sampling the analog signal is increased. Accordingly, when various types of processes are carried out on the basis of the digital data obtained by sampling the analog signal, the sampling data memory having the large capacity which can memorize plenty of digital data, is required. As a result, it requires the higher cost for the sampling data memory. Further, in the above-described method, the A/D converter which can carry out the sampling of the analog signal at the high speed, becomes a necessity. Accordingly, the structure to be fit for sampling the analog signal at the high speed is also required for each part other than the A/D converter. As a result, it has required the higher cost for the structure.
In the method as disclosed in Japanese Patent Application Publication (Laid-open) No. Tokukai-hei 10-160507, on the basis of the digital data obtained by sampling the analog signal, the operation by the complementary function is carried out. Accordingly, the amount of operation has been increased remarkably, so that the longer measuring time has been required. In order to shorten the measuring time, it has required to use the hardware which can carry out the operation process at the high speed. As a result, it has required the higher cost for the hardware.
The present invention was developed in view of the above-described problems.
An object of the present invention is to provide a peak detecting device which can efficiently detect the peak of the analog signal in the much smaller error for the short time without making the sampling frequency higher, when detecting the peak of the analog signal.
In accordance with one aspect of the present invention, the peak detecting device comprises: a clock signal output member for outputting a clock signal having a predetermined frequency; a detecting member for detecting a signal level of an analog signal which is given from an outside, at a clock timing which is synchronized with the clock signal outputted from the clock signal output member; and a timing shift member for shifting the clock timing at which the signal level of the analog signal is detected by the detecting member.
According to the peak detecting device having such a structure, the clock signal output member outputs the clock signal having the predetermined frequency, the detecting member detects the signal level of the analog signal which is given from the outside, at the clock timing which is synchronized with the clock signal outputted from the clock signal output member, and the timing shift member shifts the clock timing at which the signal level of the analog signal is detected by the detecting member.
Accordingly, the timing at which the signal level of The analog signal is detected, can be changed. Consequently, when the timing at which the signal level of the analog signal is detected, is delayed greatly from one at which the peak of the analog signal is detected, it is possible to detect the signal level of the analog signal at the timing nearer one of the peak of the analog signal, by changing the timing.
Especially, when the peak detecting device is applied to the A/D converter for sampling the analog signal to generate the digital signal, the timing for sampling the analog signal can be changed easily. Therefore, when the sampling frequency is integer times as many as the frequency of the analog signal, it is possible to make the difference between the signal level of the analog signal, which is carried out the sampling and the peak value of the analog signal smaller. Accordingly, it is possible to obtain easily the digital signal which reflects the peak value of the analog signal more correctly and which has the high reliability, for the short time, without making the sampling frequency higher and carrying out the complex operation process. As a result, it is possible to require only the lower production cost as possible.
Preferably, in the above-described peak detecting device, the clock signal output member comprises a frequency-dividing member for frequency-dividing a reference clock signal which is given from an outside, by a predetermined frequency-dividing ratio to generate the clock signal, and the timing shift member changes the frequency-dividing ratio of the frequency-dividing member to shift the clock timing at which the signal level of the analog signal is detected.
According to the peak detecting device having such a structure, the frequency-dividing member of the clock signal output member frequency-divides the reference clock signal which is given from the outside, by the predetermined frequency-dividing ratio to generate the clock signal, and the timing shift member changes the frequency-dividing ratio of the frequency-dividing member to shift the clock timing at which the signal level of the analog signal is detected.
Accordingly, when the reference clock signal is frequency-divided by the frequency-dividing ratio, the clock signal is generated, and when the frequency-dividing ratio is changed by the timing shift member, the clock timing at which the signal level of the analog signal is detected is shifted.
Consequently, it is possible to provide a device having the simple structure for changing the clock timing at which the signal level of the analog signal is detected. As a result, by the peak detecting device which can be realized at the low cost, it is possible to obtain more easily the digital signal which reflects the analog signal more correctly and which has the high reliability.
Preferably, in the above-described peak detecting device, the clock signal output member comprises a frequency-dividing member for frequency-dividing a reference clock signal which is given from the outside, by a predetermined frequency-dividing ratio to generate the clock signal, and the timing shift member changes the frequency-dividing ratio of the frequency-dividing member temporarily to shift the clock timing at which the signal level of the analog signal is detected.
According to the peak detecting device having such a structure, the frequency-dividing member of the clock signal output member frequency-divides the reference clock signal which is given from the outside, by the predetermined frequency-dividing ratio to generate the clock signal, and the timing shift member changes the frequency-dividing ratio of the frequency-dividing member temporarily to shift the clock timing at which the signal level of the analog signal is detected.
Accordingly, when the frequency-dividing ratio is changed by the timing shift member, the clock timing at which the signal level of the analog signal is detected is shifted. After the clock timing is shifted temporarily, the signal level of the analog signal is detected on the basis of the clock signal having the original frequency.
Consequently, when the peak detecting device is applied to the A/D converter for sampling the analog signal to generate the digital data, it is possible to prevent the amount of digital data to be obtained by sampling from increasing remarkably or the like. Further, when the A/D converter caries out the sampling of the analog signal, it is enough only to change the sampling frequency temporarily. As a result, there is no possibility to make the process for digital data obtained by the sampling more complex.
In accordance with another aspect of the present invention, the peak detecting method comprises: a first step of outputting a clock signal having a predetermined frequency; a second step of detecting a signal level of an analog signal which is given from an outside, at a clock timing which is synchronized with the clock signal outputted at the first step; and a third step of shifting the clock timing at which the signal level of the analog signal is detected at the second step.
Preferably, in the above-described peak detecting method, in the first step, the clock signal is generated by frequency-dividing a reference clock signal which is given from an outside by a predetermined frequency-dividing ratio, and in the third step, the clock timing at which the signal level of the analog signal is detected, is shifted by changing the frequency-dividing ratio in the first step.
Preferably, in the above-described peak detecting method, in the first step, the clock signal is generated by frequency-dividing a reference clock signal which is given from an outside by a predetermined frequency-dividing ratio, and in the third step, the clock timing at which the signal level of the analog signal is detected, is shifted by changing the frequency-dividing ratio in the first step temporarily.
In accordance with a further aspect of the present invention, the peak detecting device comprises: a frequency divider for frequency-dividing a frequency of a reference clock signal which is given from an outside, by a frequency-dividing ratio, to generate a sampling clock signal; a frequency-dividing ratio setting device for outputting a frequency-dividing ratio setting signal to the frequency divider, which can change the frequency-dividing ratio of the frequency divider; an A/D converter for carrying out a sampling of an analog signal which is given from an outside, at a clock timing which is synchronized with the sampling clock signal outputted from the frequency divider; a sampling data memory for memorizing digital data which are obtained by the sampling by the A/D converter; and a data processor for reading out the digital data which are memorized in the sampling data memory to determine a peak of the digital data.
Preferably, in the peak detecting device as the above-described, when the frequency-dividing ratio is changed, the clock timing for the sampling by the A/D converter is changed, even while the A/D converter is carrying out the sampling of the analog signal.